cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 1/9 MTN007N03LS3 cystek product specification 30v n-channel enhancement mode mosfet MTN007N03LS3 bv dss 30v i d 780ma r dson @v gs =4.5v, i d =400ma 310m (typ) r dson @v gs =2.5v,i d =250ma 440m (typ) r dson @v gs =1.8v,i d =150ma 580m (typ) features ? simple drive requirement ? small package outline ? pb-free lead plating and halogen-free package symbol outline ordering information device package shipping MTN007N03LS3-0-t1-g sot-323 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel MTN007N03LS3 sot-323 d s g g gate s source d drain
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 2/9 MTN007N03LS3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 8 v continuous drain current @ t a =25 c (note 3) 780 continuous drain current @ t a =70 c (note 3) i d 620 ma pulsed drain current (notes 1, 2) i dm 3.5 a p d 0.35 w maximum power dissipation@ t a =25 linear derating factor 0.003 w/ c esd susceptibility 1000 (note 4) v operating junction and storage temperature tj, tstg -55~+150 c note : 1. pulse width limited by maximum junction temperature. 2. pulse width 300 s, duty cycle 2%. 3. surface mounted on 1 in2 copper pad of fr-4 board, t 10 seconds. 4. human body model, 1.5k in series with 100pf. thermal performance parameter symbol limit unit thermal resistance, junction- to-ambient(pcb mounted) (note) rth,ja 360 c/w note : surface mounted on 1 in2 copper pad of fr-4 board, t 10 seconds. electrical characteristics (tj=25 c, unless otherwise noted) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, i d =250 a ? bv dss / ? tj - 0.02 - v/ c reference to 25c, i d =250 a v gs(th) 0.5 0.75 1.0 v v ds =v gs , i d =250 a i gss - - 5 v gs = 8v, v ds =0 - - 1 v ds =30v, v gs =0 i dss - - 10 a v ds =24v, v gs =0 (tj=70 c) - 310 400 v gs =4.5v, i d =400ma - 440 600 v gs =2.5v, i d =250ma *r ds(on) - 580 750 m v gs =1.8v, i d =150ma *g fs - 1.2 - s v ds =5v, i d =400ma dynamic ciss - 58 - coss - 10 - crss - 6 - pf v ds =15v, v gs =0, f=1mhz
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 3/9 MTN007N03LS3 cystek product specification t d(on) - 6 - t r - 7 - t d(off) - 14 - t f - 4 - ns v ds =15v, i d =400ma, v gs =4.5v, r g =6 qg - 1.4 - qgs - 0.2 - qgd - 0.5 - nc v ds =24v, i d =780ma, v gs =4.5v source-drain diode *v sd - 0.74 1.2 v v gs =0v, i s =100ma *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 4/9 MTN007N03LS3 cystek product specification typical characteristics typical output characteristics 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 012345 v ds , drain-source voltage(v) i d , drain current (a) v gs =2.5v v gs =3v v gs =3.5v v gs =1.5v v gs =2v 5v 4.5 v 4v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 0 200 400 600 800 1000 1200 1400 1600 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =4.5v v gs =2.5v v gs =1.8v reverse drain current vs source-drain voltage 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 i dr , reverse drain current (a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 100 200 300 400 500 600 700 800 900 1000 012345 v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =400ma drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =4.5v, i d =400ma
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 5/9 MTN007N03LS3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 1 10 100 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) v gs( th) , normalized threshold voltage i d =250 a single pulse power rating, junction to ambient (note on page 2) 0 5 10 15 20 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c r ja =360c/w gate charge characteristics 0 2 4 6 8 10 0 0.5 1 1.5 2 2.5 3 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =780ma v ds =24v v ds =15v v ds =10v maximum safe operating area 0.01 0.1 1 10 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c, v gs =4.5v, r ja =360c/w single pulse maximum drain current vs junctiontemperature 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =4.5v, r ja =360c/w
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 6/9 MTN007N03LS3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 0.5 1 1.5 2 2.5 3 3.5 012345 v gs , gate-source voltage(v) i d , drain current (a) v ds =5v power derating curve 0 0.1 0.2 0.3 0.4 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board with 1 in 2 p ad area transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *z ja (t) 4.r ja =360 c/w forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pu l s e d v ds =5v
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 7/9 MTN007N03LS3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 8/9 MTN007N03LS3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c867s3 issued date : 2012.10.12 revised date : 2013.09.09 page no. : 9/9 MTN007N03LS3 cystek product specification sot-323 dimension marking: millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.900 1.100 0.035 0.043 e1 2.150 2.450 0.085 0.096 a1 0.000 0.100 0.000 0.004 e 0.650 typ 0.026 typ a2 0.900 1.000 0.035 0.039 e1 1.200 1.400 0.047 0.055 b 0.200 0.400 0.008 0.016 l 0.525 ref 0.021 ref c 0.080 0.150 0.003 0.006 l1 0. 260 0.460 0.010 0.018 d 2.000 2.200 0.079 0.087 0 8 0 8 e 1.150 1.350 0.045 0.053 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . style: pin 1.gate 2.source 3.drain 3-lead sot-323 plastic surface mounted package cystek package code: s3 te date ch code
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